A 32 Bit Superfast SRAM Design - Report Writing - Engineering Assignment Help

Assignment Task -

 Design  Assignment:  Design of 16  bit SRAM

Design a 32 bit superfast SRAM  adding memory cell, sense amplifiers, I/O buffers with ESD protection, simulate the circuit using microwind tool.   Draw  the layout Generate timing diagram for read and write. Simulate the timing using spice. You can use any technology library available in the internet.

The important blocks in a memory are the following:

1. Address decoders

2. Memory cell array

3. Sense amplifiers

4. I/O buffers.

As a first part of the project, design a 6 to 64 superfast decoder with minimum delay, you have already designed  including layout the optimized decoder.

Now you have to design the following:

1. 2 to 4 column decoder to access 4 columns. 

2. Design 6 transistor SRAM cell with maximum read disturbance tolerance, easy to write.

3. Instance the cell for 256 bits.

4. Add Bit conditioning, column select, sense amplifiers, I/O buffers etc. 

5. Develop Timing Diagrams. 

Write a Report based on your findings and simulations.

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