ELEC1710 - Digital and Computer Electronics 1

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Submission Requirements

  • Submit one file (PDF or Word) to Canvas including:

    • All working steps for Q1 and Q2

    • Pictures of the Logisim circuits

  • Submit your Logisim files for Q1 and Q2.

Lab Demonstration

  • Demonstrate your working Logisim circuit in the lab.

  • Build and demonstrate your hardware circuits in person.

  • Be prepared to answer questions about your submission.

  • If you finish during the first scheduled Project A session, you may request marking immediately (so you don’t need to rebuild it in the following session).

Note: Marking allocation is available in the marking guide on Canvas. Examples will be shown during lectures.

Q1: Four-Digit Student Number on a 7-Segment Display

Task:
Design and implement a circuit to display the first four digits of your student number (including the leading “C”) on a single 7-segment display , one digit at a time.

  • Use two input switches to select which digit to display.

  • Example (Student ID: c3012245):

    • Input 00 → display (0th digit)

    • Input 01 → display (1st digit)

    • Input 02 → display (2nd digit)

    • Input 11 → display (3rd digit)

Design Steps:

  1. Truth Table

    • Construct and include the truth table for your circuit.

  2. Boolean Algebra

    • Derive a minimal SOP expression for each of the seven outputs ( a, b, c, d, e, f, g ).

  3. Circuit Design (on paper)

    • Use only 2-input AND/OR gates and 1-input NOT gates .

    • Aim to minimize gate count using reduction techniques taught in lectures.

    • Include a diagram showing:

      • The two input switches

      • Your decoding circuit

      • The 7-segment display

  4. Logisim Implementation

    • Build the circuit in Logisim using 7400-lib (Ben Oztalay) 2-input AND, OR, and NOT gates.

    • Use generic components for input switches and 7-segment display.

  5. Hardware Implementation

    • Build the circuit on a breadboard using:

      • 74-series AND, OR, NOT ICs

      • Switches and a 7-segment display

    • Do not use the CD74HC4511 decoder from Lab 2.

    • Follow the same method used in Lab 2 for connecting switches and display.

Q2: Full Student Number on a 7-Segment Display

Task:
Extend the Q1 design to display your entire student number .

  • Use three input switches to select which digit is displayed.

  • Example: If input = 101 (binary = 5), display the 5th digit of your ID (counting “C” as the 0th digit).

Design Steps:

  1. Truth Table

    • Construct and include the truth table for your circuit.

  2. Karnaugh Maps

    • Use K-maps to derive minimal SOP expressions for each of the seven outputs ( a–g ).

  3. Circuit Design

    • Use any Logisim gates (not restricted to 2-input).

    • Optimize gate count by using 3-input or 4-input gates where possible.

    • Apply simplification techniques discussed in lectures.

  4. Logisim Implementation

    • Implement the circuit using switches and a 7-segment display.

    • Export the circuit layout as an image (or take a screenshot) and include it in your submission file.

    • Note: You do not need to use 74-series ICs or build on breadboard for Q2.

Marking

Marks are awarded for:

  • Correct truth tables

  • Correct Boolean simplification / K-map working

  • Efficient circuit diagrams

  • Proper Logisim implementation

Format: Written working must be submitted, but a formal report format is not required .

Summary of Assessment Requirements

The project required students to design and implement digital circuits for displaying their student number on a 7-segment display , both partially (Q1) and fully (Q2). The submission involved:

  • A single file (PDF/Word) including:

    • All working steps for Q1 & Q2

    • Truth tables, Boolean algebra/K-map simplification

    • Circuit diagrams

    • Pictures/screenshots of Logisim circuits

  • Submission of Logisim files for both questions

  • A lab demonstration :

    • Working Logisim implementation

    • Hardware demonstration (Q1 only) using 74-series ICs, switches, and 7-seg display

    • Answering questions in person

Q1 – Four-digit display:

  • Use two switches to select which of the first four digits of the student ID (including “C”) to display.

  • Construct a truth table, simplify Boolean expressions, design using 2-input AND/OR and NOT gates, implement in Logisim (7400-lib), then build and test on breadboard hardware.

Q2 – Full student number display:

  • Extend design to display the full student number using three input switches.

  • Construct truth table, simplify using K-maps, design with multi-input gates, implement in Logisim (generic gates).

  • Only software implementation required (no hardware).

Marking criteria:

  • Accuracy of truth tables

  • Correct Boolean/K-map simplification

  • Efficient circuit design

  • Proper Logisim implementation

Step-by-Step Mentor Guidance

The Academic mentor guided the student through the assessment as follows:

Step 1 – Understanding Requirements

  • Broke down the task into Q1 (partial display) and Q2 (full display) .

  • Clarified the difference between hardware implementation (Q1) and simulation-only (Q2).

  • Stressed the importance of truth tables, simplification methods, and circuit efficiency.

Step 2 – Q1 Design Process

  1. Truth Table: Mentor guided the student in mapping switch inputs (00, 01, 10, 11) to the correct digit (“C”, 3, 0, 1).

  2. Boolean Algebra: Student derived SOP expressions for each segment (a–g), with mentor feedback on simplification.

  3. Paper Circuit Design: Mentor emphasized limiting gate usage by reusing terms and applying Boolean reduction.

  4. Logisim Implementation: Mentor instructed using 7400-lib 2-input gates to replicate real hardware.

  5. Hardware Build: Student replicated the design on breadboard with ICs, switches, and 7-seg display. Mentor assisted in troubleshooting wiring and verifying correct outputs.

Step 3 – Q2 Design Process

  1. Truth Table: Extended mapping for all digits of the student number, using 3 input switches.

  2. Karnaugh Maps: Mentor guided the student through grouping to achieve minimal SOP expressions.

  3. Circuit Design: Used multi-input gates (3-input and 4-input) for efficiency, as permitted in Q2.

  4. Logisim Implementation: Built the circuit in software, took screenshots, and verified correct operation for all inputs.

Step 4 – Review and Preparation for Demonstration

  • Mentor checked that truth tables, Boolean simplifications, and circuit diagrams were clear and included in the written submission.

  • Ensured Logisim files ran correctly for both Q1 and Q2.

  • Prepared the student to explain their design choices during the lab demo.

Final Outcome and Learning Achievements

  • The student produced a complete submission with truth tables, Boolean/K-map simplifications, efficient circuit diagrams, and working Logisim circuits.

  • Q1 was successfully demonstrated both in Logisim and hardware on a breadboard, while Q2 was completed in Logisim.

Learning Objectives Achieved:

  • Digital logic design skills – creation of truth tables, SOP expressions, and minimized Boolean functions.

  • Circuit implementation skills – designing with AND, OR, NOT gates in both simulation and hardware.

  • Problem-solving and optimization – reducing gate count for efficient hardware design.

  • Practical application – translating theoretical knowledge into working Logisim simulations and physical breadboard circuits.

  • Academic skills – presenting clear working, diagrams, and being able to defend the design during lab questioning.

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