ELEC30003.2: ASIC Design - Different Constructs of VHDL - Engineering Assignment Help

Assignment Task:

Task:

Module Learning Outcomes
The following LOs are achieved by the student by completing the assignment successfully

•  Explain different constructs of VHDL;
•  Explain the general architecture of CPLD/FPGA devices;
•  Design combinational and sequential systems ;

Assignment Objective
The objective of the assignment is to ensure the achievement of the learning process related to VHDL programming and familiarization with the architecture of ASIC.

Assignment Tasks:
Task 1:
Submit a work proposal (outline) for the below tasks (Task 2-4) on or before 19-11-20 including
* Understanding of deliverables – a detail description of deliverables.
* General overview of proposed plan - initial understanding of solutions& references.
* Timeline for completion of the given tasks.
The work proposal must be submitted in a word file through the link available in Moodle. (10 Marks)

Task 2:
a. Analyze the VHDL code given below for a Flip flop and
I. Describe the nature of all the inputs, (6 Marks)
II. Obtain the functional table of the flip flop with values of ‘input’, ‘clk’, ‘pre’, ‘clr’, ‘Q’ and ‘Qbar’; and (8 Marks)
III. Identify the type of the Flipflop; (1 Marks)

library ieee;
use ieee.std_logic_1164.all;
entity FF is
port (input,clk,pre,clr: in std_logic; Q: buffer std_logic; Qbar: out std_logic);
end entity FF;
architecture behavior of FF is
begin
Process (clk )
begin
if (clk’event and clk=‘1’ )then

if pre= ‘0’ then

Q<= ‘1’;

Elsif clr=‘1’ then

Q<='0';
elsif (input=‘0’) then
Q<=’0’;
Qbar <= not Q;

elsif (input=‘1’) then
Q<=’1’;
Qbar<=Q;

end if;
endif;
end process;
end behavior;

Task 3:
a. Consider the following process statement written within the architecture body which is executed. Determine the values of var1, temp and q at different simulation time and complete the following Table-2. Each column represents a new value of a and b at different simulation time and Δ represents delta delay. Initial value of var1, temp and q is written incolumn 1.

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