Floor Plan Optimisation - Integrated Circuits - Linear Program - MATLAB - Engineering Assessment Answer

Assessment Task:

Floor Plan Optimisation MATLAB Engineering Assessment Answer

Floor Plan Optimisation

During the design process of integrated circuits (ICs), many optimisation problems need to be solved simultaneously. One of these problems concerns the positioning of components with various functionality at a physical position on the chip. Typical criteria for this design problem are wire lengths, heat generation, delays, isolation, contact points, and so on. For example, the total length of the wires needed for interconnecting the components is an important criterion for positioning components on the chip.

In this assignment, we will optimise the floor plan of a chip by using a linear program. We assume that the designer has an initial indication of the desired positions of the components on the chip. This initial floor plan, with the relative positions of the components, is provided through a sketch of the expected positions of the various components on the chip. For every component, a rectangular area is allocated on the chip. This is done in a way that the entire design defines a partition of the complete rectangular chip. Figure 1 shows an example of such a partitioning. This choice is meant as a first step in the design process and hence, the exact dimensions of the components are only approximated and not specified in advance.

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