The 3-Pin SPI Configuration - The Analog-to-Digital Converter (ADC) Module Uses a Clock Signal - IT Assignment Help

Assignment Task:

QUESTION 1.  
Part a) Channel 1 is scheduling periodic interrupts every 15K cycles (K=1024). Show how the interrupts are scheduled and demonstrate that the operation is still correct when a rollback to zero occurs on
TACCR1. Show enough cases that span two rollbacks to zero.
Part b) Channel 2 is scheduling periodic interrupts every 25K cycles (K=1024). Show how the interrupts are scheduled and demonstrate that the operation is still correct when a rollback to zero occurs on
TACCR2. Show enough cases that span two rollbacks to zero.

QUESTION 2.  
Part a) The timer is running in the up mode with a period of 800 cycles. Channel 1 engages the output mode (Set/Reset) and sets its register TACCR1 = 600. Explain what happens. Draw a timeline.

Part b) Repeat the previous part based on the (Reset/Set) mode.

QUESTION 3.  
Each time an event occurs (e.g. button push), the program needs to time a duration of 0.25 seconds (using ACLK=32 KHz) and raise an interrupt when this duration elapses. Note that this interval is timed only when the event occurs, not repeatedly back-to-back.
Part a) Can we set this up using the up mode? If yes, explain how.
Part b) Can we set this up using the continuous mode? If yes, explain how.
Part c) If both modes are possible, explain the preferable mode.
Part d) If the timer is used intermittently, is it possible to turn the timer on/off throughout the program? How is this done?
Part e) Timer_A is running in the continuous mode and none of its interrupts is enabled. TAR has cycled the full range (0 to 64 K) a few times and the program didn’t interact with the timer’s bit fields or registers. At this point, what is the value of each of the flags: TAIFG, CCIFG flags of Channels 0, 1, 2?
Part f) In our program, when an interrupt event occurs, it’s disabled for a little while (e.g. 10 seconds) and then it’s re-enabled. When is the best time to clear the interrupt’s flag: when it disabled or when it’s reenabled?

QUESTION 4.  
Part a) Draw the configuration where an SPI master is connected to two devices that are individually selected.
Part b) Draw the configuration where an SPI master is connected to two devices in a daisy chain.
Part c) What is the 3-pin SPI configuration? What’s the difference between 3-pin SPI and 3-wire serial?

QUESTION 5. 
The analog-to-digital converter (ADC) module uses a clock signal that varies in the range [20 -40] Hz due to the operating conditions and error. The sample-and-hold time of the signal we’re converting is 2.5 seconds. The ADC allows selecting a number of cycles from the list below.
Number of cycles: 10, 40, 80, 110, 150, 200, 250, 300
Part a) Show the analysis for choosing the suitable number of cycles.
Part b) The conversion takes 20 cycles. What is the total operation time (that includes the sample-andhold time and the conversion)?

Note: the numeric values in this question are chosen to simplify the computations; an ADC usually uses a much higher clock frequency and the sample-and-hold time is usually in the micro-seconds range.

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