The Average CPI for Loop Iteration - The Execution Cycle - IT Assignment Help

Assignment Task:

The pipeline resolves conditional branch instructions at the end of ID2 (an outcome of conditional branches). In case there are data dependencies for conditional branches, the data is forwarded to ID2 by EX2 or forwarded to ID2 by MEM. For unconditional branch instruction, target address is computed at the end of ID1. The pipeline always starts to fetch the next instruction (PC+4) if it is possible. If instructions along incorrect path are fetched and executed instructions, their results will be flushed after branch outcome or target is available (ID2 for conditional branches and ID1 for unconditional branches).  

1. Further, assume that there are nops after the last add instruction.

The table above shows the execution time of one iteration of the loop assuming that I2 and I5 are not taken. The number of clock cycles for one iteration is 16. CPI = 16 cycles/10 instructions. 

The table above shows the execution time of one iteration of the loop assuming that I2 is not taken and I5 are taken. The number of clock cycles for one iteration is 16. CPI = 16 cycles/8 instructions.

Next, we will study different static branch prediction schemes. Assume that branch prediction happens at ID1. Both branch direction and target address are predicted at the end of ID1. 

(a) Always not-taken. 

A pipeline can be designed to guess that every conditional branch is not taken (An alternative is to predict that every conditional branch is taken). 

What is the average CPI for loop iteration when neither I2 nor I5 is taken (I2 not taken, I5 not taken)? (The pipeline applies always not-taken as prediction)

What is the average CPI for loop iteration when I2 is not taken, I5 is taken (I2 not taken, I5 is taken)?  (The pipeline applies always not-taken as prediction)

What is the average CPI of the loop (say running the loop for 100 iterations)? Show your calculations. 

(b) Software Branch Hint. 

Assume that developers can provide hints to conditional branches. The hints are encoded as part of conditional branches. The first branch I2 has hint very likely not taken. The second branch I5 has hint very likely taken. Using the hint, the pipeline will always guess that I2 is not taken and I5 is taken.

What is the execution cycle? (Pipeline predicts I2 not taken, I5 taken; Actual execution: I2 not taken, I5 not taken)

(c) Perfect Branch Prediction.

Assume that both I2 and I5 are perfectly predicted (100% accuracy). Prediction is always correct. 

For one iteration of the loop, please fill the table below (I2 is not taken, I5 is not taken). Prediction is I2 not taken, I5 not taken.

For one iteration of the loop, please fill the table below (I2 is not taken, I5 is taken). Prediction is I2 not taken, I5 taken.

What is the execution cycle of the loop (I2 is not taken, I5 is not taken)? (perfect prediction)

What is the execution cycle of the loop (I2 is not taken, I5 is taken)? (perfect prediction)

2. Dynamic Branch Predictors

Designers of a new computer decided to implement a hybrid branch prediction scheme shown in the drawing below. The hybrid design comprises two branch prediction paths (local prediction, and correlating prediction). 

The local prediction uses a local history table to record the taken/not-taken history of a branch. For each branch, the local history table holds 2 bits of branch history, indexed by the instruction address. For each branch, local prediction uses the 2-bit local history to select from one of the four 1-bit prediction counters.  Each 1-bit counter makes its prediction based on one of two possible values: 0 (not taken), and 1 (taken). 

The correlating prediction uses a 1-bit global register (g) to store the direction of the last branch executed (which may not be the same branch as the branch currently being predicted). For each branch (using instruction address as index), correlating prediction uses the 1-bit global register (g) to select from one of the two 1-bit prediction counters. Each 1-bit counter makes its prediction based on one of two possible values: 0 (not taken), and 1 (taken).

3.Cache Configurations (10 pts). For the following, assume a 32-bit address.

(a) Consider a cache with 32KB of data, 4-way set associativity, and 32 byte line size. What is the size of each line’s tag in bits?

(b) Consider a cache with 1024 sets, 8-way set associativity, and 17-bit tags. How many bytes can the cache store? (What is the data capacity not including overhead for storing tags, valid bits, etc.?)

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